ISRO ISTRAC Technical Assistant (Electronics) 2026 Free Guess Paper

ISRO opened the Technical Assistant (Electronics) post under Advertisement ISTRAC:02:2026 for 6 vacancies at Level 7 of the pay matrix. A diploma-level post at India’s space agency draws lakhs of applicants each cycle, so a candidate needs a clear read of the paper pattern and the score history before the next notification lands.

TL;DR

• The post carries 6 vacancies under Post Code 005, open to diploma holders in Electronics.
• The written test has 80 MCQs in 90 minutes, with +1 mark for a correct answer and -0.33 for a wrong one.
• Past cycles show an unreserved cut off near 32 out of 80 for this exact post and discipline.
• A skill test follows the written test on a go/no-go basis, and the shortlist ratio runs at 1:5 per vacancy.
• The confirmed pay level for this post is Level 7, which starts at ₹44,900 per month plus allowances.
• The syllabus leans on core diploma subjects: analog and digital electronics, network theory, and communication systems.

Why This Post Draws High Competition

A Technical Assistant post at ISRO offers Level 7 pay, a government job guarantee, and work inside a space research center. A diploma is the only formal requirement, so the applicant pool spans fresh diploma holders and experienced electronics technicians. This mix raises the competition level for a small vacancy count.

The low vacancy number changes exam strategy. With 6 seats open under Post Code 005, a fractional mark separates a selected candidate from a waitlisted one. A candidate must treat accuracy, not just topic coverage, as the main lever for a higher rank.

Written Test Structure

The written test uses a single-stage, computer-based, multiple-choice format. It differs from the paper used for the Assistant and UDC posts, which runs 200 questions over 120 minutes.

Each wrong answer costs almost one-third of a correct answer’s value. A candidate must skip a guess unless two of the four options are already ruled out. Speed matters less than answer selection, since 90 minutes for 80 questions gives just over one minute per question.

Cut Off Trends for the Electronics Discipline

ISRO released written-test cut off marks for the Technical Assistant (Electronics) post in a recent recruitment cycle, out of a maximum of 80. The unreserved cut off stood at 32.05, the OBC cut off at 28.12, and the SC cut off at 24.47.

A score near 40 out of 80 places a candidate well clear of the historical unreserved cut off and builds a buffer against a harder paper in a future cycle. A score below 30 carries real risk for an unreserved candidate, since the margin between cut off and elimination stays thin at this vacancy count.

Skill Test Cut Off

The skill test that follows the written test runs on a go/no-go basis and carries its own pass mark. For this post category, the unreserved pass mark sits at 50 out of 100, and the reserved-category pass mark sits at 40 out of 100. A pass here does not add extra marks to the merit list. It removes a candidate from the list if the score falls short.

Selection Process, End to End

ISRO runs a two-stage process for this post: a written test, then a skill test for shortlisted candidates. The written test score alone builds the merit list. The skill test acts as a qualifying gate.

1. Written test. 80 MCQs, 90 minutes, category-wise cut off applies.
2. Shortlist for skill test. ISRO calls candidates in a 1:5 ratio against each vacancy, with a floor of 10 candidates per post.
3. Skill test. A practical, go/no-go assessment of electronics skills tied to the post.
4. Final merit list. Built from the written test score of candidates who clear the skill test.

A candidate must clear both stages. A high written score does not carry over into the final merit weight beyond crossing the skill test gate.

Syllabus Map for the Electronics Paper

The technical portion of the paper draws from a standard diploma-level electronics curriculum, close to the base syllabus used for GATE-pattern electronics papers. The paper also carries general knowledge, reasoning, and numerical ability questions outside the core technical section.

A candidate should rank Analog Electronics, Digital Electronics, and Network Theory above the rest for study time. These three areas repeat across ISRO’s electronics papers at every center, from ISTRAC to VSSC to URSC.

PYQ-Driven Study Method

A repeat-question pattern shows up across ISRO’s technical papers year after year. A candidate gains more from solving five years of previous ISRO electronics papers than from a single new question bank.

Build a topic-wise error log while solving past papers. Mark each wrong answer by root cause: a concept gap, a calculation slip, or a rushed guess. This log turns a stack of solved papers into a ranked revision list, which matters more than the raw number of papers attempted.

Standard reference texts for this paper match the GATE Electronics and Communication syllabus. Useful titles include Fundamentals of Electric Circuits by Sadiku and Alexander, Digital Logic and Computer Design by Morris Mano, and Signals and Systems by Oppenheim and Willsky. A candidate does not need every title. Pick one book per weak topic area, not a full shelf.

Salary, Fee, and Cost Considerations

The Technical Assistant (Electronics) post sits at Level 7 of the 7th Pay Commission matrix, with a starting basic pay of ₹44,900 per month, plus admissible allowances such as house rent and dearness allowance. This places it above the Technician-B posts, which start near ₹21,700 at Level 3.

The application fee for the Technical Assistant post runs at ₹750 for general, OBC, and EWS candidates. This fee gets a partial refund of ₹500 after the candidate appears for the written test. SC, ST, PwBD, and women candidates get a full fee refund after appearing for the test. This refund structure lowers the real cost of a genuine attempt and raises the cost of a no-show, since a skipped exam forfeits the refund path.

A private coaching program for ISRO-pattern electronics preparation adds a real cost on top of the exam fee. A candidate on a fixed budget should weigh a structured self-study plan built on past papers and standard textbooks against a paid coaching batch, based on available study time rather than on marketing claims from any single provider.

Common Questions

What is the age limit for the ISRO ISTRAC Technical Assistant (Electronics) post? The age limit runs from 18 to 35 years, counted as on the last date fixed in the notification. Reserved categories get standard government age relaxation.

Is there an interview for this post? No. Selection uses a written test followed by a qualifying skill test. There is no interview stage for this post.

Can a B.Tech holder apply for the Technical Assistant (Electronics) post? The notification asks for a First Class Diploma in Electronics from a recognized board. A candidate should check the exact eligibility line in each new notification, since ISRO sets discipline and degree-level rules separately for each cycle.

How many attempts does ISRO allow for this post? ISRO does not cap the number of attempts by age-eligible candidates for Technical Assistant posts. A candidate can reapply in each new recruitment cycle within the age limit.

Where are the posting locations for this role? ISTRAC-linked Technical Assistant posts draw postings across ISRO centers, including Bengaluru, Hassan, and Sriharikota, based on organizational need at the time of joining.

What This Means for the Next Cycle

ISRO fills a small number of Technical Assistant (Electronics) seats each cycle, and the exam format has stayed stable: 80 MCQs, a fixed negative marking rate, and a core diploma-level electronics syllabus. A candidate who tracks past cut offs, builds a topic-ranked PYQ log, and treats the skill test as a hard gate rather than a formality stands a stronger chance than one who studies the full syllabus at even depth. The next ISTRAC notification will likely repeat this same structure, so a candidate who starts this cycle’s PYQ analysis now enters the next application window with a tested, not a guessed, study plan.